Co-Packaged Optics and Silicon Photonics

Co-packaged optics gets described as the next horizon of AI networking so often that it is easy to forget how little of it can be pinned to a named company, a process node, or a price. When I went to write the chapter on it for my ESDM book, I found the underlying research repository had almost nothing on it. That turned out to be useful. It forced me to separate three things that usually get blended together in trade coverage: the physical problem, which is well understood and worth explaining carefully; the industrial detail, which I cannot source; and the one materials fact that does hold up, which is that silicon cannot make light.

This piece follows the same discipline. I explain why the electrical path out of a switch chip has become a constraint, what co-packaging changes, what silicon photonics is and where it still depends on other materials, and what an engineer or buyer should ask before believing any specific claim in this area. I do not give market shares, foundry names, or power-per-bit figures, because I have no source for them, and a specific-sounding number I cannot check is worse than no number.

The problem is the copper, not the switch

A modern data-center switch is built around one large ASIC that moves data between ports. The ASIC itself has kept getting faster. The trouble starts when the signal leaves it. In a conventional design the electrical signal travels from the switch die across the printed circuit board, through a connector, and into a pluggable optical transceiver sitting at the faceplate of the chassis. Only there is it converted to light and sent down the fibre.

Every centimetre of that copper trace and every connector along the way loses signal. At low data rates that loss is a minor design detail. At high per-lane rates it becomes the design. The loss has to be recovered with equalisation electronics, and equalisation costs power. The faster the lane, the harder the electronics work to make a signal survive a few tens of centimetres of board. At some point the electrical reach between the switch silicon and the point where the signal becomes light limits both power consumption and how much bandwidth you can pack into a given faceplate, however good the ASIC is.

I find it helpful to say this plainly, because the popular framing is "optics is faster than copper." That is true but not the point. Light is not what gets faster here. What changes is where the conversion from electrons to photons happens, and therefore how much copper the signal has to cross before it gets there.

What co-packaging actually changes

Co-packaged optics moves the optical engine, the component that converts electrical signal to light and back, onto the same substrate or package as the switch ASIC. The electrical path shrinks from a board-scale distance to a package-scale distance. In principle that cuts the power spent conditioning the signal for each bit, and it frees the faceplate from having to host every conversion point.

I say "in principle" on purpose. The engineering logic is sound and widely described. What I cannot give you is a measured comparison, because the book I am drawing on has no quantified power, cost per bit, or reach comparison between co-packaged and pluggable architectures. Any article that hands you a single percentage for the saving is drawing on a vendor slide or an assumption about a specific design. The size of the saving depends on the data rate, the reach, the equalisation scheme in the pluggable being displaced, and the thermal design of the package. Those are exactly the variables a headline number hides.

There is a second, less discussed change. Putting optics inside the package puts a component with a different failure profile next to the most expensive chip in the system. A pluggable module can be swapped by hand at the faceplate if it fails. A co-packaged engine is part of a much larger, costlier assembly. Whether that trade is acceptable depends on reliability data I do not have, so I flag it as a question rather than an answer.

Why AI networking is the driver

The reason this architecture is being discussed now, and not a decade ago, is demand. My book's chapter on AI server and accelerator architecture documents rack-scale systems built around dense GPU-to-GPU interconnect fabrics. It notes the use of 800G-class optical transceivers connecting AI server racks over InfiniBand and RoCE Ethernet fabrics. That is the one documented, sourced data point I have that touches this subject.

It is consistent with the case for co-packaging without proving it. The aggregate bandwidth leaving an AI rack has grown faster than the reach of copper can comfortably support, so the network already leans on optics at the highest commercially available rates. At that tier, the power and reach penalty of taking every signal to a faceplate module gets harder to absorb. That is the constraint CPO is designed to relieve. But the source says 800G-class pluggables are used. It does not say CPO is deployed, and I will not blur that.

Silicon photonics: the fabrication side of the idea

Silicon photonics is the manufacturing approach most often paired with co-packaging. The idea is to build optical waveguides, modulators, and photodetectors as structures on a silicon or silicon-on-insulator wafer, using process techniques adapted from conventional CMOS manufacturing. Adapted, not identical: photonic structures have their own tolerances, such as waveguide loss and modulator bandwidth, and they do not scale the way transistors do.

The appeal is manufacturing. Discrete optical components built on compound-semiconductor substrates have historically been made in lower volumes with less tightly controlled processes. A silicon platform promises wafer-scale fabrication, batch processing, and the possibility of integrating optical and electronic functions close together. That is why the two ideas travel together: co-packaging needs an optical engine small and cheap enough to sit inside a switch package, and silicon photonics is the most commonly cited route to that.

The part silicon cannot do

Here is the materials fact I am confident about, and it is the most useful thing in this piece for anyone who wants to reason about where the supply chain complexity really sits. Silicon is an indirect-bandgap semiconductor. It cannot efficiently emit light. Indium phosphide, by contrast, is a direct-bandgap material: an electron recombining across its bandgap emits a photon efficiently instead of losing the energy as heat. That single distinction is why indium phosphide has historically been the substrate of choice for lasers at the 1310 nanometre and 1550 nanometre wavelengths that define long-haul and metro fibre communications.

So even an otherwise fully silicon photonic system generally still needs a III-V light source. It can be hybrid-bonded onto the silicon chip, coupled in from outside, or otherwise integrated. Waveguiding, modulation, and detection can be built in silicon. The laser cannot, at least not efficiently. No amount of CMOS-style process control changes that, because it is a property of the material.

The consequence for the supply chain is straightforward. A silicon-photonic co-packaged switch does not remove compound semiconductors from the bill of materials. It reduces the number of places they appear, and it makes the light source a specialised, high-value input that every design still depends on. Any discussion of CPO volume ramps that skips the laser supply is skipping the part with the hardest materials constraint.

What is grounded and what is not

I keep a running ledger when I write about a subject like this, and I think readers are better served by seeing it than by having it hidden inside confident prose. The table below is the honest state of what I can source for this topic. Anything marked as not sourced is not a claim that the thing does not exist. It is a claim that I did not find a dated, retrievable reference for it, so I will not state it.

Two things stand out when I read that table back. First, the sourced rows are all about materials and demand, and the unsourced rows are all about industrial structure. That is a common pattern for emerging technologies: the physics is documented long before the supply chain is. Second, the unsourced rows are exactly the ones a buyer or investor would want most. Who fabricates the engines, at what yield, into which switch platforms, at what price. That is where trade-press claims cluster, and where I would be most sceptical of any single figure.

The compound-semiconductor thread

It helps to be precise about which materials belong in this conversation. Gallium arsenide and gallium nitride are both compound semiconductors, and my book covers them in depth for their role in RF power amplification: handset front ends, base stations, radar. They are not part of the optical-interconnect story. I mention this because it is tempting to stretch the compound-semiconductor label across everything adjacent to photonics and imply a shared supply chain that the sources do not support. I do not.

Indium phosphide is the exception. It appears in this story because of the laser, and it also serves ultra-high-frequency RF above 100 GHz. That is the one compound-semiconductor material that genuinely sits under both the pluggable optics world and the silicon-photonic world. The book's reference file stops at that level of generality. It does not name indium phosphide epitaxial wafer suppliers, laser structures such as distributed feedback or externally modulated designs, or the packaging methods for finished transceivers, and neither does any other file I have.

That matters for anyone trying to assess supply risk. If the laser is the one input silicon cannot replace, then the depth and geographic spread of indium phosphide laser capacity is a central supply question for CPO. I cannot answer it. I can only say it is the right question, and that it will not be answered by looking at silicon foundry capacity alone.

Where the risk sits if CPO does scale

If co-packaged optics does move into volume, the supply-side consequences are worth thinking through, even without named suppliers. The optical engine moves into the package, so packaging capability becomes part of the story in a way it is not for a faceplate module. Advanced packaging is already a capacity-constrained area in AI hardware, and adding photonic components to a package that already carries a switch die does not relax that constraint. That is inference from general engineering, not a sourced claim about any specific package.

The light source is the second pressure point. A pluggable module carries its own laser. A co-packaged design still needs one, and if lasers are consolidated into a smaller number of external sources feeding many optical engines, the failure and supply profile of that source changes. I mention it because it is the kind of second-order effect that gets lost when the conversation is only about the switch die and the fibre.

The third is qualification. Hyperscale operators qualify components over long cycles, and a new architecture that changes serviceability resets some of that work. Whether that slows adoption or not depends on evidence I do not have. I list it as a factor to watch, not as a prediction.

Five questions I would ask before believing a CPO claim

Because I cannot fill the gaps, the most useful thing I can offer is a way of pressure-testing what others say. These are the questions I use.

1. What is the baseline?

A power or cost saving is only meaningful against a defined pluggable design at a defined data rate and reach. A claim without the baseline is a marketing number. Ask which pluggable form factor and which equalisation approach the comparison assumes.

2. Where does the laser come from?

If the answer is silent on the light source, the analysis is incomplete. Ask whether the laser is integrated, bonded, or external, who makes it, and what the supply looks like for the III-V material underneath it.

3. What happens when a component fails?

Pluggables can be replaced at the faceplate. Ask how a co-packaged design handles a failed optical engine, what the serviceability model is, and whether the reliability data covers the operating life the customer expects.

4. Which claims are deployments and which are demonstrations?

Announcements, prototypes, pilots, and volume shipments are different things. Ask for the stage of each named claim. My sourced data point, 800G-class pluggables in AI racks, is a deployment. Nothing I hold about CPO is.

5. What is the fabrication route, and who runs it?

Silicon photonics is not one process. Ask which fabs run photonic flows, at what wafer size, with what waveguide-loss and modulator-bandwidth specifications. Those numbers determine whether the promised wafer-scale economics are real. I do not have them, so I treat any claim about them as unverified.

What a proper evidence base would need

Closing the gap is a defined task rather than a vague aspiration, and I find it worth stating because it tells you what to look for in future coverage. A well-grounded treatment of CPO would need dated reference material on at least four things. Silicon photonics foundries and process platforms, including which fabs run photonic flows and their capabilities. Named co-packaged switch platforms and the optical-engine suppliers behind them, with any documented timelines. The pluggable transceiver market as a subject in its own right, covering form factors, named vendors, volumes, and pricing, so that CPO can be evaluated against what it is meant to displace and not in the abstract. And a laser-diode device-physics reference covering the DFB, EML, and VCSEL architectures, since CPO systems inherit the same light-source dependency that discrete transceivers have.

The pluggable market point deserves emphasis. It is common to read CPO analysis that treats the incumbent as a static baseline. Pluggable optics are also improving. A fair evaluation compares CPO against where pluggables will be when CPO reaches volume, not where they are today. Without a documented pluggable market, that comparison cannot be made rigorously, and that is a weakness in most of what I read on the subject, not only in my own sources.

What to take away

For me the useful lesson is about method as much as subject. On a topic this fashionable, the physics is the easy part to get right and the industrial claims are the easy part to get wrong. Naming that boundary clearly, and telling the reader which side each statement falls on, is worth more than a longer article with more numbers in it. When the sourced research catches up, I will revise the industrial sections. Until then, the physics and the laser dependency are the parts I would rely on.